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PeakRDL-BusDecoder documentation

Introduction
Register Block Architecture
Hardware Interface
Configuring PeakRDL-BusDecoder
Known Limitations
Frequently Asked Questions
Licensing
Exporter API

CPU Interfaces

Introduction
AMBA APB
AMBA AXI4-Lite
Intel Avalon
CPUIF Passthrough
Internal CPUIF Protocol
Customizing the CPU interface

SystemRDL Properties

Field Properties
Register Properties
Addrmap/Regfile Properties
Signal Properties
RHS Property References

Other SystemRDL Features

External Components

Extended Properties

Introduction

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By Arnav Sacheti

© Copyright 2025, Arnav Sacheti.